The semiconductor integrated circuit industry has experienced rapid growth in the past several decades. Technological advances in semiconductor materials and design have produced increasingly smaller and more complex circuits. These material and design advances have been made possible as the technologies related to processing and manufacturing have also undergone technical advances. In the course of semiconductor evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. Despite advances in materials and fabrication, in order to further decrease the geometry size, conventional planar MOSFET devices have encounter challenging(s). As such, a variety of devices that are not planar-based or include non-planar components have attracted attention such as, for example, a Fin FET device, a vertical FET, etc.
While a variety of techniques to fabricate a non-planar device (e.g., a vertical FET) based on a nanowire/nanowire array have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.
The various features disclosed in the drawings briefly described above will become more apparent to one of skill in the art upon reading the detailed description below. Where features depicted in the various figures are common between two or more figures, the same identifying numerals have been used for clarity of description.